Digital logic circuit architectures are essentially one of two types:--voltage mode logic circuits (where the logical variable is represented by a node voltage or the difference between two node voltages) and current mode logic circuits (where the logical variable is represented by the presence or absence of a branch current relative to a node). Examples of voltage mode logic circuits are illustrated in FIG. 1, which shows a bipolar diode-transistor logic (DTL) architecture, and FIG. 2, which shows an emitter-coupled logic (ECL) architecture. An example of a current mode logic circuit is illustrated in FIG. 3 as a current injection logic or (I.sup.2)L-configured bipolar transistor architecture.
In each of these conventionally employed schemes, the loop and node equations which define the logical operation of the extended circuit (namely including the output of a driving logic circuit and the input of a cascaded or driven logic circuit) are necessarily impacted by current transients in one or more power distribution (e.g. Vcc, Vee, ground) rails to which the bipolar components are connected and the effect of which is diagrammatically represented as a noise voltage source Vn.
In addition, voltage differentials of various nodes of voltage mode logic circuitry are often on the order of hundreds of millivolts (e.g. on the order of 500 to 600 millivolts for an ECL mode circuit) to several volts (e.g. up to five volts for a CMOS digital logic circuit). Unfortunately, the parasitic capacitances associated with such nodes are often coupled with adjacent (analog) circuits in an overall signal processing architecture, so that such node variations of the logic circuit may be sensed by and erroneously affect the operation of the analog circuit.
Within conventional current injection logic circuits, not only may node voltage variations be substantial (up to 500 mv), but both PNP and NPN devices customarily operate at saturation, so that the speed-power product is relatively poor.